抗闩锁效应微处理器复位电路设计研究

Design of the MCU Reset Circuit with Latchup Immune

中文关键词:  CMOS  闩锁效应  微处理器  电路应用级  复位  泄流

英文关键词:CMOS  latchup  MCU  application of circuit  reset  discharge

中文摘要:

      主要探究解决控制系统在频繁通断电情况下容易死机的问题。通过对传统微处理器复位电路的理论分析和工作波形仿真，发现在电源掉电时，微处理器在其复位引脚受到外部复位电容的放电冲击时，容易进入闩锁状态。由此提出上电复位电路也是容易导致CMOS电路进入闩锁的外部触发条件之一，并在此基础上设计了一种新型抗闩锁复位电路，能够自动检测电源掉电，导通泄流回路，使复位电容避开复位引脚放电。仿真分析和样机测试验证了其抗闩锁功能的有效性。

英文摘要:

      It is aimed to solve the crash problem of control systems,which is usually caused by frequent switch.Through the theoretical analysis of traditional MCU reset circuit and simulation of its operational waveform,it is found that,in case of power off,MCU is likely to be in a latchup state when its reset pin suffered from the discharge impact of an external reset capacitor.It is then inferred that power on reset (POR) circuit is one of the external triggers for CMOS latchup.Based on this,a new type of reset circuit with latchup immune is designed,which can automatically detect power off and turn on the discharge circuit,thus the reset capacitor will discharge through the discharge circuit and not affect the MCU reset pin.Simulation and experimental results confirmed the latchup immune of this new POR circuit.