基于FPGA小数内插的新型数字射频存储器设计

Design of Fractional Interpolating Digital Radio Frequency Memory Based on FPGA

中文关键词:  目标模拟器  数字射频存储  小数内插

英文关键词:target simulator  digital radio frequency memory  fractional interpolating

中文摘要:

      介绍了数字射频存储技术的基本原理及其实现结构，分析了影响其性能的各种因素。提出了基于FPGA小数内插的方法对传统数字射频存储器进行改进，在不提高系统工作时钟的条件下，试图提高回波模拟信号的距离精度,给出了改进后的数字射频存储器结构。经过实际系统测试，证明了改进后的数字射频存储器可有效提高雷达回波信号的距离精度，满足距离高分辨雷达的需求。

英文摘要:

      The structure and basic principles of digital radio frequency memory (DRFM) are introduced,the factors that affect its performances are analyzed.A new fractional interpolating technique is proposed to improve the traditional structure of DRFM.Without increasing the system working clock,the distance accuracy of radar echo signal is trying to be improved.Test and application show that the improved DRFM can effectively increase the distance accuracy of radar echo signal，which meets the development requirements of high range resolution radar.